Technology

59656 readers

2752 users here now

This is a most excellent place for technology news and articles.

Our Rules

Follow the lemmy.world rules.
Only tech related content.
Be excellent to each another!
Mod approved content bots can post up to 10 articles per day.
Threads asking for personal tech support may be deleted.
Politics threads may be removed.
No memes allowed as posts, OK to post as comments.
Only approved bots from the list below, to ask if your bot can be added please contact us.
Check for duplicates before posting, duplicates may be removed

Approved Bots

founded 1 year ago

MODERATORS

Only about 720,000 Qualcomm Snapdragon X laptops sold since launch — under 0.8% of the total number of PCs shipped in Q3, or less than 1 out of every 125 devices (www.techradar.com)

submitted 1 day ago* (last edited 1 day ago) by Alphane_Moon@lemmy.world to c/technology@lemmy.world

27 comments fedilink hide all child comments

Source Canalys report

Relevant quote regarding Snapdragon X

“As this was the first full quarter of shipments for Snapdragon X Series PCs, we saw sequential growth of around 180% compared to Q2 2024. However, as a proportion of the total Windows market, the products remain very niche, at less than 1.5% share. The top shipping vendor was Microsoft, which has transitioned most of their Surface line to the platform. Behind them was Dell who has embraced the new platform quite strongly in terms of SKU count, followed by HP, Lenovo, Acer and Asus (all four with similar volumes).”

you are viewing a single comment's thread
view the rest of the comments

[–] Amir@lemmy.ml -1 points 20 hours ago (1 children)

One of the reasons why it's harder for x86 is because the instruction set is simply more complex. You either need a decoder to turn it into simpler instructions, or more hardware to handle the complex instructions, both of which increase the number of transitors, and therefore power draw until we create a room temp superconductor

[–] pycorax@lemmy.world 4 points 20 hours ago

Both RISC and CISC decode into micro-ops regardless. Read the article, it goes into detail, the diagrams make it pretty clear if you don't want to read the whole article. Modern processors have no notable differences between RISC or CISC designs anymore in the way you described. The only thing RISC and CISC differs in is essentially just the interface that assemblers assemble code into. Which is different across ISAs anyways.